Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-switched Inter-FPGA Networks

A Survey of FPGA Benchmarks

New markets are emerging for the fast growing field-programmable gate array (FPGA) industry. Standard and fair benchmarking practices are necessary to evaluate FPGA systems and determine their potential to support target applications. This paper provides an extensive survey of FPGA benchmarks in both academia and industry.

Fpga: Digital Designs

Parallelizing FPGA Circuit Placement

Increasing the performance of uniprocessor systems is becoming increasingly difficult. As a result, processor systems are moving towards chip multiprocessor designs. Because of this trend, parallel programming design is becoming increasingly important. This presents new issues for complex software optimized for uniprocessor performance. CAD tools for placing and routing of FPGA designs are an e...

Immuno-repairing of FPGA designs

FPGAs can be used for the design of autonomic reliable systems. Advantages are reconfiguration and flexibility in the design. However commercial FPGAs are first prone to errors. Second, the design flow is not yet supported for the use of fault tolerance techniques like Built-In Self-Tests. Fault tolerance can be reached through error detection and fault recovery. Most error detection techniques...

Energy Profiling and Analysis of the HPC Challenge Benchmarks

Future high performance systems must use energy efficiently to achieve PFLOPS computational speeds and beyond. To address this challenge, we must first understand the power and energy characteristics of high performance computing applications. In this paper, we use a power-performance profiling framework called PowerPack to study the power and energy profiles of the HPC Challenge benchmarks. We...